3×3 2D Convolution Engine

Hardware Dataflow: Sequential Vertical Accumulation

Simulation Control

Data Legend

Input Pixel (Broadcast)
Partial Sum (Cumulative)
Final Result

Hardware Schematic

Input Image (SRAM)

Output Map (DRAM)

Execution Trace

Press Play or Single Step to see each convolution cycle.

  1. 1) Read one input pixel
  2. 2) Broadcast to 3 rows
  3. 3) Move partial sums
  4. 4) Write output when 3×3 window is ready

Dimensions

W (Width): width of the input image (pixels per row).

K (Kernel Size): width of the convolution filter. Here, K = 3 for a 3×3 kernel.

Formula (stride = 1, padding = 0): Output Width = W - K + 1

In this demo: W = 10, K = 3 → Output Width = 8.