Array vs. Vector vs. MIPS Pipeline

Comparing $\text{Scalar}$, $\text{Time-Parallel (Vector)}$, and $\text{Space-Parallel (Array)}$ architectures.

Cycle 0

System Idle

Input Memory (A[3:0]) Output Memory (A[3:0])

LAMS Logic

Pipeline Performance

Elements (N) 4
Instruction Fetches 0
Total Elapsed Cycles 0

MIPS Pipeline

Select a mode to explore architectural differences.